Microsemi's next-generation SmartFusion®2 SoC FPGAs are the only devices that address fundamental requirements for advanced security, high reliability and low power in critical industrial, military, aviation, communications and medical applications.
SmartFusion2 integrates an inherently reliable flash-based FPGA fabric, a 166 megahertz (MHz) ARM ® CortexTM-M3 processor, advanced security processing accelerators, DSP blocks, SRAM, eNVM, and industry-required high-performance communication interfaces all on a single chip.
Recent attacks on military, industrial, communications and aviation systems have highlighted the need for security and anti-tamper safeguards within electronic systems. SmartFusion2 provides the most advanced design and data security capabilities starting with a robust root-of-trust device with secure key storage capability using the SoC FPGA industry's only physically unclonable function (PUF) key enrollment and regeneration capability from Intrinsic ID.
SmartFusion2 is also the only SoC FPGA protected from differential power analysis (DPA) attacks using technology from Cryptography Research Incorporated (CRI) portfolio. Microsemi's programmable logic solutions are used extensively in military, aviation and space applications due to their reliability and protection against Single Event Upset (SEU)occurrences, which can cause binary bits to change state and corrupt data and cause hardware malfunction. Industrial and medical safety markets are also requiring SEU protection as vital requirement for their applications.
Features
SmartFusion2 integrates for the first time nonvolatile flash based FPGA with a full feature microcontroller subsystem, enhanced FPGA fabric and high speed serial and memory interfaces.
The FPGA fabric composed, of 4-input LUT logic elements, includes embedded memories and mathblocks for DSP processing capabilities.
The microcontroller subsystem adds the Embedded Trace Macrocell, instruction cache and includes USB, CAN and gigabit Ethernet. High speed serial interfaces with up to 4 SERDES lanes support PCIe, XAUI and Native SERDES interfaces and up to two high speed DDR memory interfaces are included supporting LPDDR, DDR2 and DDR3.
- 166 MHz ARM ® CortexTM-M3 with on-chip eSRAM and eNVM •Includes ETM and Instruction Cache
- Extensive peripherals - CAN, TSE, USB
Most Secure FPGA
- DPA hardened, AES256, SHA256, random number generator, ECC, PUF
Most Reliable FPGA
- SEU immune zero FIT flash FPGA configuration cells
- SEU protected memories: eSRAMs, DDR bridges (MSS, MDDR, FDDR), Instruction Cache, Ethernet, CAN and USB buffers, PCIe, MMUART and SPI FIFOs
- Hard 667 Mbps DDR2/3 controllers with SECDED (also called EDAC) protection
- Built-in self test
Lowest power FPGA
- 2mW in Flash *freeze mode
- 7mW static power during operation
- 50% Lower Total Power
2x fabric performance
- 16x 5Gbps SERDES, PCIe, XAUI / XGXS+ Native SERDES
- Integrated DSP processing blocks
- 150K LUT, 5Mbit SRAM, 4Mbit eNVM