FPGA - Mixed Signal & ARM CPU

Microsemi's next-generation SmartFusion®2 SoC FPGAs are the only devices that address fundamental requirements for advanced security, high reliability and low power in critical industrial, military, aviation, communications and medical applications. SmartFusion2 integrates an inherently reliable flash-based FPGA fabric, a 166 megahertz (MHz) ARM ® CortexTM-M3 processor, advanced security processing accelerators, DSP blocks, SRAM, eNVM, and industry-required high-performance communication interfaces all on a single chip. Recent attacks on military, industrial, communications and aviation systems have highlighted the need for security and anti-tamper safeguards within electronic systems. SmartFusion2 provides the most advanced design and data security capabilities starting with a robust root-of-trust device with secure key storage capability using the SoC FPGA industry's only physically unclonable function (PUF) key enrollment and regeneration capability from Intrinsic ID. SmartFusion2 is also the only SoC FPGA protected from differential power analysis (DPA) attacks using technology from Cryptography Research Incorporated (CRI) portfolio. Microsemi's programmable logic solutions are used extensively in military, aviation and space applications due to their reliability and protection against Single Event Upset (SEU)occurrences, which can cause binary bits to change state and corrupt data and cause hardware malfunction. Industrial and medical safety markets are also requiring SEU protection as vital requirement for their applications.

Features

SmartFusion2 integrates for the first time nonvolatile flash based FPGA with a full feature microcontroller subsystem, enhanced FPGA fabric and high speed serial and memory interfaces. The FPGA fabric composed, of 4-input LUT logic elements, includes embedded memories and mathblocks for DSP processing capabilities. The microcontroller subsystem adds the Embedded Trace Macrocell, instruction cache and includes USB, CAN and gigabit Ethernet. High speed serial interfaces with up to 4 SERDES lanes support PCIe, XAUI and Native SERDES interfaces and up to two high speed DDR memory interfaces are included supporting LPDDR, DDR2 and DDR3. - 166 MHz ARM ® CortexTM-M3 with on-chip eSRAM and eNVM •Includes ETM and Instruction Cache - Extensive peripherals - CAN, TSE, USB Most Secure FPGA - DPA hardened, AES256, SHA256, random number generator, ECC, PUF Most Reliable FPGA - SEU immune zero FIT flash FPGA configuration cells - SEU protected memories: eSRAMs, DDR bridges (MSS, MDDR, FDDR), Instruction Cache, Ethernet, CAN and USB buffers, PCIe, MMUART and SPI FIFOs - Hard 667 Mbps DDR2/3 controllers with SECDED (also called EDAC) protection - Built-in self test Lowest power FPGA - 2mW in Flash *freeze mode - 7mW static power during operation - 50% Lower Total Power 2x fabric performance - 16x 5Gbps SERDES, PCIe, XAUI / XGXS+ Native SERDES - Integrated DSP processing blocks - 150K LUT, 5Mbit SRAM, 4Mbit eNVM

Overview coming soon - Call 01527 830800 for information

Microsemi's SmartFusion2 Security Evaluation Kit makes it easy to develop secure embedded systems and provides the best-in-world solutions for both Design Security—when protecting your design IP is critical; and Data Security—when protecting application data is necessary. The kit provides a cost effective SoC field programmable gate array (FPGA) platform for developing cost-optimized SoC FPGA designs using Microsemi's SmartFusion2 SoC FPGAs, which integrate inherently reliable flash-based FPGA fabric, a 166 MHz ARM® Cortex®-M3 processor, advanced security processing accelerators, DSP blocks, SRAM, eNVM, and industry-required high-performance communication interfaces—all on a single chip. In addition, the SmartFusion2 Security Evaluation comes with a large 90K LE device to make it easy to develop transceiver I/O-based FPGA designs to build PCI Express® and Gigabit Ethernet-based systems and also have room for large IP blocks to complement the design. The board is also small form-factor PCIe compliant, which will allow quick prototyping and evaluation using any desktop PC or laptop with a PCIe slot. The kit enables you to: • Evaluate the Data Security features of SmartFusion2 SoC FPGAs including: – Elliptic Curve Cryptography (ECC) – SRAM-PUF (Physically Unclonable Function) – Random Number Generator (RNG) – AES/SHA – Anti-Tamper • Develop and test PCI Express Gen2 x1 lane designs • Test the signal quality of the FPGA transceiver using full-duplex SERDES SMA Pairs • Measure the low power consumption of the SmartFusion2 SoC FPGA • Quickly create a working PCIe link with the included PCIe Control Plane Demo The board includes an RJ45 interface to 10/100/1000 Ethernet, 512 MB of LPDDR, 64 MB SPI Flash, and USB-UART connections, as well as I2C, SPI, and GPIO headers. The kit includes a 12 V power adapter, but can also be powered through the PCIe edge connector. Also included is a free Platinum License for the Libero SoC software toolset to enable FPGA development and to utilize the reference designs made available with the kit.

Features

Kit Contents: 1x SmartFusion®2 system-on-chip (SoC) FPGA 90K LE M2S090TS-FGG484 Evaluation Board 1x USB A male to micro-B male cable 1x 12 V, 2 A AC power adapter 1x Quickstart guide 1x Libero® System-on-Chip (SoC) Platinum software one year license 1x FlashPro4 programmer

SmartFusion® System on Chip (SoC) FPGAs are the only devices that integrate an FPGA fabric, ARM Cortex-M3 Processor, and programmable analog circuitry, offering the benefits of full customization and IP protection, while still being easy to use. Based on a proprietary flash process, SmartFusion SoC FPGAs are ideal for hardware and embedded designers who need a true system-on-chip (SoC) solution that gives more flexibility than traditional fixed-function microcontrollers without the excessive cost of soft processor cores on traditional FPGAs. SmartFusion SoC FPGAs provide you with: Full Design Customisability. - Create a product with exactly the features you need - Innovate and differentiate for a competitive edge - Incorporate last-minute changes with an on-chip FPGA fabric - Future-proof your design with in-application programming (IAP) capability for field upgrades - Experiment with hardware acceleration for select algorithms in FPGA fabric Intellectual Property (IP) Protection - Inherent flash FPGA IP security with a complete SoC - Snoop-free interface between microcontroller and FPGA - High design security since no bitstream download is required at power-up - Secure in-system programming (ISP) with 128-bit Advanced Encryption Standard (AES) via JTAG - FlashLock ® to prevent FPGA contents from being read back - Protection against overbuilding with customer programmable device key Ease-of-Use Increases Productivity - A single platform for your entire line of products - Libero SoC integrated design environment for both FPGA and embedded designers - Simple GUI-based configuration of complex programmable analog - Industry leading compile and debug from Keil™, IAR Systems® and GNU - Micrium supports SmartFusion devices with real time operating system (RTOS) and middleware components

Features

Microcontroller Subsystem (MSS) - Hardware industry-standard 100 MHz, 32-bit ARM Cortex-M3 CPU - Multi-layer AHB communication matrix with up to 16 Gbps throughput - 10/100 Ethernet MAC with RMII interface - Two of each: SPI, I2C, UART, 32-bit timers - Up to 512 KB flash and 64 KB of SRAM - External memory controller (EMC) - 8-channel DMA controller - Up to 41 MSS I/Os with Schmitt trigger inputs - 25 I/Os can be used as FPGA I/Os FPGA Fabric - Based on Microsemi's proven ProASIC3 architecture - 60,000 to 500,000 system gates with 350 MHz system performance - Embedded SRAMs and FIFOs - Variable aspect ratio 4,608-bit SRAM blocks - x1, x2, x4, x9 and x18 organizations - True dual-port SRAM (including x18) - Up to 128 FPGA I/Os supporting LVDS, PCI, PCI-X and LVTTL/LVCMOS standards Programmable Analog - High-performance analog signal conditioning blocks (SCB) with voltage, current and temperature monitors - Analog compute engine (ACE) offloads CPU from analog initialization and processing of analog-to-digital conversion (ADC), digital-to-analog conversion (DAC) and SCBs - Integrated ADCs and DACs with 1 percent accuracy - 12-/10-/8-bit mode ADCs with 500/550/600 Ksps sampling rate - Up to ten 15 ns high-speed comparators - Up to 32 analog inputs and 3 outputs